UPD78F1000GB-GAF-AX Renesas Electronics America, UPD78F1000GB-GAF-AX Datasheet - Page 32

• Manufacturer Part Number: UPD78F1000GB-GAF-AX
• Description: MCU 16BIT 78K0R/KX3-L 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3-Lr

Specifications of UPD78F1000GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0R/Kx3-L
1.4.5 78K0R/KG3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
• 100-pin plastic LQFP (14 × 20)
Note
Cautions 1. Make AV
Remarks 1. When using the microcontroller for an application where the noise generated inside the microcontroller
SCK40, SCK41, SI40, SI41, SO40, SO41, TxD4, RxD4 pins are only mounted in the
78F1030.
2. Make EV
3. Connect the REGC pin to Vss via a capacitor (0.47 to 1
4. P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 are set as analog inputs in the order of
2. For pin identification, see 1.5 Pin Identification.
P31/TI03/TO03/INTP4
P157/ANI15, …, P150/ANI8, P27/ANI7, …, P20/ANI0 by the A/D port configuration register (ADPC).
When using P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 as analog inputs, start designing
from P157/ANI15 (see 13.3 (6) A/D port configuration register (ADPC) for details).
must be reduced, it is recommended to supply separate powers to the V
connect the V
P30/INTP3/RTC1HZ
P77/KR7/INTP11
P76/KR6/INTP10
P75/KR5/INTP9
P74/KR4/INTP8
P64/TI10/TO10
P65/TI11/TO11
P66/TI12/TO12
P67/TI13/TO13
P61/SDA0
P60/SCL0
P73/KR3
P72/KR2
P71/KR1
P70/KR0
SS
DD0
EV
EV
, EV
P62
P63
P06
P05
P80
P81
P82
P83
P84
P85
P86
P87
and EV
DD1
SS1
SS
SS0
and two EV
, and EV
DD1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
the same potential as V
SS1
SS
pins to separate ground lines.
the same potential as V
DD
.
SS
.
μ
F: target).
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P140/PCLBUZ0/INTP6
P141/PCLBUZ1/INTP7
P142/SCK20/SCL20
P143/SI20/RxD2/SDA20
P144/SO20/TxD2
P145/TI07/TO07
P00/TI00
P01/TO00
P02/SO10/TxD1
P03/SI10/RxD1/SDA10
P04/SCK10/SCL10
P131/TI06/TO06
P130
P20/ANI0
P21/ANI1
P22/ANI2
P23/ANI3
P24/ANI4
P25/ANI5
P26/ANI6
P150/ANI8
P151/ANI9
P152/ANI10
P153/ANI11
P154/ANI12
P155/ANI13
P156/ANI14
P157/ANI15
AV
P27/ANI7
SS
DD
CHAPTER 1 OUTLINE
and two EV
μ
PD78F1029 and
DD
pins and
32