M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 94

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 8.13 State Transition in Normal Operating Mode
CM04, CM05, CM06, CM07: Bits in CM0 register
CM11, CM15, CM16, CM17: Bits in CM1 register
CM20, CM21
PLC07
NOTES:
1. Avoid making a transition when the CM20 bit is set to 1 (oscillation stop, re-oscillation detection function enabled).
2. Wait the main clock oscillation stabilizes.
3. Switch clock after oscillation of sub clock is sufficiently stable.
4. Change bits CM17 and CM16 before changing the CM06 bit.
5. Transit in accordance with arrow.
6. The PM20 bit in the PM2 register become effective when the PLC07 bit is set to 1 (PLL on). Change the PM20 bit when the PLC07 bit is set
7. Set the CM06 bit to 1 (divide-by-8 mode) before changing back the operating mode from on-chip oscillator mode to high-speed or middle-speed
8. When the CM21 bit = 0 (on-chip oscillator turned off) and the CM05 bit = 1 (main clock turned off), the CM06 bit is fixed to 1 (divide-by-8 mode)
PLL operating mode
PLL operating mode
Set the CM20 bit to 0 (oscillation stop, re-oscillation detection function disabled) before transiting.
Main clock oscillation
to 0 (PLL off). Set the PM20 bit to 0 (2 waits) when PLL clock > 16 MHz.
mode.
and the CM15 bit is fixed to 1 (drive capability High).
Apr 14, 2006
Sub clock oscillation
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 0
CM04 = 1 CM04 = 0
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 0
CPU clock
CPU clock
: f(PLL)
: f(PLL)
CM11 = 1
CM11 = 1
PLC07 = 1
PLC07 = 0
PLC07 = 1
PLC07 = 0
CM11 = 0
CM11 = 0
(6)
(6)
page 70 of 376
High-speed mode
High-speed mode
: Bits in CM2 register
: Bit in PLC0 register
CPU clock
CPU clock
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 0
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 0
: f(XIN)
: f(XIN)
Medium-speed mode
Medium-speed mode
(divide-by-2)
(divide-by-2)
CPU clock
CPU clock
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 1
CM07 = 0
CM06 = 0
CM17 = 0
CM16 = 1
: f(XIN)/2
: f(XIN)/2
CM04 = 1
CM07 =1
CM05 = 1
Low power dissipation mode
CPU clock: f(XCIN)
CPU clock: f(XCIN)
Low-speed mode
(3)
Medium-speed mode
Medium-speed mode
(1) (8)
CM07 = 0
CM07 = 0
CM06 = 1
CM15 = 1
(divide-by-4)
(divide-by-4)
CPU clock
CPU clock
CM07 = 0
CM06 = 0
CM17 = 1
CM16 = 0
CM07 = 0
CM06 = 0
CM17 = 1
CM16 = 0
: f(XIN)/4
: f(XIN)/4
Medium-speed mode
Medium-speed mode
(divide-by-8)
(divide-by-8)
CPU clock
CPU clock
CM07 = 0
CM06 = 1
CM07 = 0
CM06 = 1
: f(XIN)/8
: f(XIN)/8
CM04 = 0
CM07 = 0
CM05 = 0
(2) (4)
Medium-speed mode
Medium-speed mode
(divide-by-16)
(divide-by-16)
CPU clock
CPU clock
: f(XIN)/16
CM07 = 0
CM06 = 0
CM17 = 1
CM16 = 1
: f(XIN)/16
CM07 = 0
CM06 = 0
CM17 = 1
CM16 = 1
CM21 = 0
CM21 = 1
CM21 = 0
CM21 = 1
CM21 = 0
CM21 = 1
(7)
(7)
CPU clock: f(XCIN)
On-chip oscillator
On-chip oscillator
Low-speed mode
CM04 = 1
CPU clock
CPU clock
CM07 = 0
f(Ring)
f(Ring)/2
f(Ring)/4
f(Ring)/8
f(Ring)/16
f(Ring)
f(Ring)/2
f(Ring)/4
f(Ring)/8
f(Ring)/16
CM04 = 0
mode
mode
8. Clock Generation Circuit
CM05 = 1
CM05 = 1
CM05 = 0
CM05 = 0
On-chip oscillator
clock oscillation
low power dissipation mode
low power dissipation mode
(1)
(1)
On-chip oscillator
On-chip oscillator
CM04 = 1
CPU clock
CPU clock
f(Ring)
f(Ring)/2
f(Ring)/4
f(Ring)/8
f(Ring)/16
f(Ring)
f(Ring)/2
f(Ring)/4
f(Ring)/8
f(Ring)/16
CM04 = 0