M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 295

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 21.6 Errors and FMR0 Register Status
NOTES:
FMR07 Bit FMR06 Bit
21.3.8 Full Status Check
(SR5)
(Status Register)
If an error occurs when a program or erase operation is completed, the FMR06, FMR07 bits in the FMR0
register are set to 1, indicating a specific error. Therefore, execution results can be confirmed by checking
these bits (full status check).
Table 21.6 lists the Errors and FMR0 Register Status. Figure 21.12 shows a flow chart of the Full Status
Check and Handling Procedure for Each Error.
1. The flash memory enters read array mode by writing command code xxFFh in the second bus cycle of
2. When the FMR02 bit in the FMR0 register is set to 1 (lock bit disabled), no error occurs even under the
FRM00 Register
1
1
0
these commands. The command code written in the first bus cycle becomes invalid.
conditions above.
Apr 14, 2006
Status
(SR4)
1
0
1
page 271 of 376
Command
Sequence
error
Erase error
Program error • The program command is executed on locked blocks
Error
• The lock bit program command is executed but program
• Command is written incorrectly
• A value other than xxD0h or xxFFh is written in the second bus
• The block erase command is executed on a locked block
• The block erase or erase all unlocked block command is
• The program command is executed on unlocked blocks and
operation is not completed as expected
cycle of the lock bit program, block erase or erase all unlocked
block command
executed on an unlock block and auto-erase operation is not
completed as expected
auto-program operation is not completed as expected
Error Occurrence Conditions
(1)
21. Flash Memory Version
(2)
(2)