M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 100

MCU 5V 256K T-TEMP PB-FREE 100-Q

M306N4FGTFP#U0

Manufacturer Part Number
M306N4FGTFP#U0
Description
MCU 5V 256K T-TEMP PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP#U0

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
TI
Quantity:
3 001
Company:
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
RENESAS
Quantity:
36
Company:
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M306N4FGTFP#U0M306N4FGTFP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
M306N4FGTFP#U0M306N4FGTFP#UKJ
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
10.2 Software Interrupts
A software interrupt is generated when executing certain instructions. Software interrupts are non-
maskable interrupts.
10.2.1 Undefined Instruction Interrupt
10.2.2 Overflow Interrupt
10.2.3 BRK Interrupt
10.2.4 INT Instruction Interrupt
An undefined instruction interrupt is generated when executing the UND instruction.
An overflow interrupt is generated when executing the INTO instruction with the O flag in the FLG register
set to 1 (the operation resulted in an overflow). The following are instructions whose O flag changes by
arithmetic:
ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB
A BRK interrupt is generated when executing the BRK instruction.
An INT instruction interrupt is generated when executing the INT instruction. Software interrupt Nos. 0 to
63 can be specified for the INT instruction. Because software interrupt Nos. 1 to 31 are assigned to
peripheral function interrupts, the same interrupt routine as for peripheral function interrupts can be
executed by executing the INT instruction.
In software interrupt Nos. 0 to 31, the U flag is saved to the stack during instruction execution and is set
to 0 (ISP selected) before executing an interrupt sequence. The U flag is restored from the stack when
returning from the interrupt routine. In software interrupt Nos. 32 to 63, the U flag does not change state
during instruction execution, and the SP then selected is used.
Apr 14, 2006
page 76 of 376
10. Interrupts

Related parts for M306N4FGTFP#U0