M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 227

MCU 5V 256K T-TEMP PB-FREE 100-Q

M306N4FGTFP#U0

Manufacturer Part Number
M306N4FGTFP#U0
Description
MCU 5V 256K T-TEMP PB-FREE 100-Q
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP#U0

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Table 16.5 Repeat Sweep Mode 0 Specifications
NOTE:
Function
A/D conversion
start condition
A/D conversion
stop condition
Interrupt request
generation timing
Analog input pin
Reading of result of
A/D converter
16.1.4 Repeat Sweep Mode 0
In repeat sweep mode 0, analog voltage applied to selected pins is repeatedly converted to a digital code.
Table 16.5 lists the Repeat Sweep Mode 0 Specifications. Figure 16.7 shows Registers ADCON0 and
ADCON1 in Repeat Sweep Mode 0.
1. AN0_0 to AN0_7, and AN2_0 to AN2_7 can be used in the same way as AN0 to AN7.
Apr 14, 2006
Item
page 203 of 376
Bits SCAN1 to SCAN0 in the ADCON1 register and bits ADGSEL1 to ADGSEL0
in the ADCON2 register select pins. Analog voltage applied to the pins is
repeatedly converted to a digital code.
• When the TRG bit in the ADCON0 register is 0 (software trigger)
• When the TRG bit is 1 (ADTRG trigger)
Set the ADST bit to 0 (A/D conversion halted)
None generated
Select from AN0 to AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6 pins),
AN0 to AN7 (8 pins)
Read one of registers AD0 to AD7 that corresponds to the selected pin
The ADST bit in the ADCON0 register is set to 1 (A/D conversion starts)
Input on the ADTRG pin changes state from high to low after the ADST
bit is set to 1 (A/D conversion starts)
_____________
(1)
_____________
Specification
16. A/D Converter

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