M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 213

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 15.37 Registers S3C, S3BRG, and S3TRR
SI/O3 Control Register
SI/O3 Bit Rate Register
SI/O3 Transmit/Receive Register
NOTES:
NOTES:
NOTES:
b7 b6 b5 b4 b3 b2 b1 b0
b7
b7
1. Write to this register while serial interface is neither transmitting nor receiving.
2. Use the MOV instruction to write to this register.
3. Write to this register after setting bits SM31 to SM30 in the S3C register.
1. Write to this register while serial interface is neither transmitting nor receiving.
2. To receive data, set the corresponding port direction bit for SIN3 to 0 (input mode).
Apr 14, 2006
1. Make sure this register is written to by the next instruction after setting the PRC2 bit in the PRCR register to 1
2. When the SM32 bit is set to 1, the target pin goes to a high-impedance state regardless of which functions of the
3. Set the SM33 bit to 1 (SOUT3 output, CLK3 function) and the corresponding port direction bit to 0 (input mode).
4. Set the SM33 bit to 1 (SOUT3 output, CLK3 function).
5. When changing bits SM31 to SM30, set the S3BRG register.
6. Selected by the PCLK1 bit in the PCLKR register.
(write enabled).
pin is being used.
page 189 of 376
b0
b0
Symbol
Assuming that set value = n, S3BRG divides the count
source by n + 1
Transmission/reception starts by writing transmit data to this register.
After transmission/reception finishes, receive data can be read by reading this register.
SM30
SM31
SM32
SM33
SM34
SM35
SM36
SM37
(1)
Bit
(1) (2) (3)
Internal synchronous
clock select bits
Transfer direction select
bit
SOUT3 initial value set bit
SOUT3 output disable
bit
SI/O3 port select bit
CLK polarity select bit
Synchronous clock
select bit
(2)
Symbol
S3BRG
Symbol
Symbol
S3TRR
S3C
(1) (2)
Bit Name
Description
(5)
Address
Address
Address
01E2h
01E3h
01E0h
Description
b1 b0
0 0 : f1SIO or f2SIO is selected
0 1 : f8SIO is selected
1 0 : f32SIO is selected
1 1 : Do not set a value
0 : SOUT3 output
1 : SOUT3 output disabled (high-impedance)
0 : Input/output port
1 : SOUT3 output, CLK3 function
0 : Transmit data is output at falling edge of
1 : Transmit data is output at rising edge of
0 : LSB first
1 : MSB first
0 : External clock
1 : Internal clock
Effective when the SM33 bit = 0
0 : "L" output
1 : "H" output
transfer clock and receive data is input
at rising edge
transfer clock and receive data is input
at falling edge
After Reset
After Reset
01000000b
After Reset
(4)
Undefined
Undefined
Description
(3)
Setting Range
00h to FFh
(6)
15. Serial Interface
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
WO