M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 380

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
23.8.2.3 Timer B (Pulse Period/pulse Width Measurement Mode)
The timer remains idle after reset. Set the mode, count source, etc. using the TBiMR (i = 0 to 5) register
before setting the TBiS bit in the TABSR or TBSR register to 1 (count starts).
Always make sure the TBiMR register is modified while the TBiS bit remains 0 (count stops) regardless
whether after reset or not. To set the MR3 bit to 0 by writing to the TBiMR register while the TBiS bit = 1
(count starts), be sure to write the same value as previously written to bits TM0D0, TM0D1, MR0, MR1,
TCK0, and TCK1 and, a 0 to the MR2 bit.
The IR bit in the TBiIC register goes to 1 (interrupt request), when an effective edge of a measurement
pulse is input or timer Bi is overflowed. The interrupt source can be determined by use of the MR3 bit in
the TBiMR register within the interrupt routine.
If the interrupt source cannot be identified by the MR3 bit such as when the measurement pulse input
and a timer overflow occur at the same time, use another timer to count the number of times timer B has
overflowed.
To set the MR3 bit to 0 (no overflow), set the TBiMR register with setting the TBiS bit to 1 and counting
the next count source after setting the MR3 bit to 1 (overflow).
Use the IR bit in the TBiIC register to detect only overflows. Use the MR3 bit only to determine the
interrupt source.
When a count is started and the first effective edge is input, an undefined value is transferred to the
reload register. At this time, timer Bi interrupt request is not generated.
A value of the counter is undefined at the beginning of a count. The MR3 bit may be set to 1 and timer Bi
interrupt request may be generated between a count start and an effective edge input.
For pulse width measurement, pulse widths are successively measured. Use program to check whether
the measurement result is an “H” level width or an “L” level width.
Apr 14, 2006
page 356 of 376
23. Usage Notes