M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 102

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
10.4 Interrupts and Interrupt Vector
Figure 10.2 Interrupt Vector
Table 10.1 Fixed Vector Tables
NOTES:
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
Address match
Single step
Oscillation stop and re-oscillation detection, FFFF0h to FFFF3h 8. Clock Generation Circuit
Watchdog timer
________
DBC
_______
NMI
Reset
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective
interrupt vectors. When an interrupt request is accepted, the CPU branches to the address set in the
corresponding interrupt vector. Figure 10.2 shows the Interrupt Vector.
10.4.1 Fixed Vector Tables
The fixed vector tables are allocated to the addresses from FFFDCh to FFFFFh. Table 10.1 lists the Fixed
Vector Tables. In the flash memory version of MCU, the vector addresses (H) of fixed vectors are used by
the ID code check function. For details, refer to 21.2 Functions to Prevent Flash Memory from Rewriting.
1. Do not normally use this interrupt because it is provided exclusively for use by development tools.
2. If the contents of address FFFE7h is FFh, program execution starts from the address shown by the
(1)
Apr 14, 2006
vector in the relocatable vector table.
(1)
Interrupt Source
(2)
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Vector address (L)
Vector address (H)
MSB
Address (L) to Address (H)
FFFDCh to FFFDFh M16C/60, M16C/20, M16C/Tiny
FFFE0h to FFFE3h Series Software Manual
FFFE4h to FFFE7h
FFFE8h to FFFEBh 10.10 Address Match Interrupt
FFFECh to FFFEFh -
FFFF4h to FFFF7h -
FFFF8h to FFFFBh
FFFFCh to FFFFFh 5. Resets
Vector table Addresses
0 0 0 0
0 0 0 0
Middle-order address
Low-order address
High-order address
11. Watchdog Timer
10.7 NMI Interrupt
0 0 0 0
_______
LSB
Reference
10. Interrupts