M306N4FGTFP#U0 Renesas Electronics America, M306N4FGTFP#U0 Datasheet - Page 236

• Manufacturer Part Number: M306N4FGTFP#U0
• Description: MCU 5V 256K T-TEMP PB-FREE 100-Q
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP#U0

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: R0K3306NKS001BE - KIT DEV RSK RSK-M16C/6NKR0K3306NKS000BE - KIT DEV RSK RSK-M16C/6NK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
18. CRC Calculation
Figure 18.1 CRC Circuit Block Diagram
The Cyclic Redundancy Check (CRC) operation detects an error in data blocks. The MCU uses a generator
polynomial of CRC-CCITT (X
The CRC code consists of 16 bits which are generated for each data block in given length, separated in 8-bit
unit. After the initial value is set in the CRCD register, the CRC code is set in that register each time one byte
of data is written to the CRCIN register. CRC code generation for one-byte data is finished in two cycles.
Figure 18.1 shows the CRC Circuit Block Diagram. Figure 18.2 shows the CRC-related registers. Figure
18.3 shows the calculation example using the CRC operation.
Figure 18.2 Registers CRCD and CRCIN
(b15)
CRC Data Register
CRC Input Register
b7
b7
Apr 14, 2006
page 212 of 376
(b8)
b0 b7
b0
When data is written to the CRCIN register after setting
the initial value in the CRCD register, the CRC code can
be read out from the CRCD register.
Data input
16
+ X
12
+ X
5
CRCIN register
+ 1) to generate CRC code.
b0
Data bus high-order
Data bus low-order
CRC code generation circuit
Low-order 8 bits
Symbol
Symbol
CRCIN
CRCD
Function
Function
CRCD register
x
16
+x
12
+x
5
+1
03BDh to 03BCh
Address
Address
03BEh
High-order 8 bits
0000h to FFFFh
00h to FFh
Setting Range
Setting Range
After Reset
After Reset
Undefined
Undefined
18. CRC Calculation
RW
RW
RW
RW