ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 950

IC MCU 32BIT 256KB FLASH 100LQFP

ATSAM3S4CA-AU

Manufacturer Part Number
ATSAM3S4CA-AU
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4CA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
79
Ram Memory Size
48KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Cpu Family
AT91
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
64MHz
Total Internal Ram Size
48KB
# I/os (max)
79
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.62V
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4CA-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3S4CA-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATSAM3S4CA-AUR
Manufacturer:
Atmel
Quantity:
10 000
• WAKEUP: USB Bus WAKEUP Interrupt
0 = USB Bus Wakeup Interrupt is disabled.
1 = USB Bus Wakeup Interrupt is enabled.
Note:
950
When the USB block is in suspend mode, the application may power down the USB logic. In this case, any USB HOST resume
request that is made must be taken into account and, thus, the reset value of the RXRSM bit of the register UDP_IMR is
enabled.
SAM3S Preliminary
6500C–ATARM–8-Feb-11

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