ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 78

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.10 Intrinsic functions
78
SAM3S Preliminary
Table 10-13. Cortex-M3 instructions (Continued)
ANSI cannot directly access some Cortex-M3 instructions. This section describes intrinsic func-
tions that can generate these instructions, provided by the CMIS and that might be provided by a
C compiler. If a C compiler does not support an appropriate intrinsic function, you might have to
use inline assembler to access some instructions.
The CMSIS provides the following intrinsic functions to generate instructions that ANSI cannot
directly access:
Table 10-14. CMSIS intrinsic functions to generate some Cortex-M3 instructions
Mnemonic
TEQ
TST
UBFX
UDIV
UMLAL
UMULL
USAT
UXTB
UXTH
WFE
WFI
Instruction
CPSIE I
CPSID I
CPSIE F
CPSID F
ISB
DSB
DMB
REV
REV16
REVSH
RBIT
SEV
WFE
WFI
Operands
Rn, Op2
Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Rd, #n, Rm {,shift #s}
{Rd,} Rm {,ROR #n}
{Rd,} Rm {,ROR #n}
-
-
CMSIS intrinsic function
void __enable_irq(void)
void __disable_irq(void)
void __enable_fault_irq(void)
void __disable_fault_irq(void)
void __ISB(void)
void __DSB(void)
void __DMB(void)
uint32_t __REV(uint32_t int value)
uint32_t __REV16(uint32_t int value)
uint32_t __REVSH(uint32_t int value)
uint32_t __RBIT(uint32_t int value)
void __SEV(void)
void __WFE(void)
void __WFI(void)
Brief description
Test Equivalence
Test
Unsigned Bit Field Extract
Unsigned Divide
Unsigned Multiply with Accumulate
(32 x 32 + 64), 64-bit result
Unsigned Multiply (32 x 32), 64-bit
result
Unsigned Saturate
Zero extend a byte
Zero extend a halfword
Wait For Event
Wait For Interrupt
Flags
-
-
-
-
Q
-
-
-
-
N,Z,C
N,Z,C
6500C–ATARM–8-Feb-11
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