ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 119

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.14 Multiply and divide instructions
6500C–ATARM–8-Feb-11
Table 10-21
Table 10-21. Multiply and divide instructions
Mnemonic
MLA
MLS
MUL
SDIV
SMLAL
SMULL
UDIV
UMLAL
UMULL
shows the multiply and divide instructions:
Brief description
Multiply with Accumulate, 32-bit result
Multiply and Subtract, 32-bit result
Multiply, 32-bit result
Signed Divide
Signed Multiply with Accumulate
(32x32+64), 64-bit result
Signed Multiply (32x32), 64-bit result
Unsigned Divide
Unsigned Multiply with Accumulate
(32x32+64), 64-bit result
Unsigned Multiply (32x32), 64-bit
result
See
“MUL, MLA, and MLS” on page 120
“MUL, MLA, and MLS” on page 120
“MUL, MLA, and MLS” on page 120
“SDIV and UDIV” on page 122
“UMULL, UMLAL, SMULL, and SMLAL” on
page 121
“UMULL, UMLAL, SMULL, and SMLAL” on
page 121
“SDIV and UDIV” on page 122
“UMULL, UMLAL, SMULL, and SMLAL” on
page 121
“UMULL, UMLAL, SMULL, and SMLAL” on
page 121
SAM3S Preliminary
119