ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 301

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.3.3.7
18.3.3.8
6500C–ATARM–8-Feb-11
Security Bit Protection
Unique Identifier
The 4/8/12 MHz Fast RC oscillator is calibrated in production. This calibration can be read
through the Get CALIB Bit command. The table below shows the bit implementation for each
frequency:
The RC calibration for 4 MHz is set to 1,000,000.
When the security is enabled, access to the Flash, either through the JTAG/SWD interface or
through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
The security bit is GPNVM0.
Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full
Flash erase is performed. When the security bit is deactivated, all accesses to the Flash are
permitted.
Each part is programmed with a 128-bit Unique Identifier. It can be used to generate keys for
example.
To read the Unique Identifier the sequence is:
Note that during the sequence, the software can not run out of Flash (or the second plane in
case of dual plane).
RC Calibration Frequency
8 MHz output
12 MHz output
• Send the Start Read unique Identifier command (STUI) by writing the Flash Command
• When the Unique Identifier is ready to be read, the FRDY bit in the Flash Programming
• The Unique Identifier is located in the first 128 bits of the Flash memory mapping. So, at the
• To stop the Unique Identifier mode, the user needs to send the Stop Read unique Identifier
• When the Stop read Unique Identifier command (SPUI) has been performed, the FRDY bit in
Register with the STUI command.
Status Register (EEFC_FSR) falls.
address
command (SPUI) by writing the Flash Command Register with the SPUI command.
the Flash Programming Status Register (EEFC_FSR) rises. If an interrupt was enabled by
setting the FRDY bit in EEFC_FMR, the interrupt line of the NVIC is activated.
0x80000-0x8000F
.
EEFC_FRR Bits
[28 - 22]
[38 - 32]
SAM3S Preliminary
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