ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 902

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

36.7.23
Name:
Address:
Access:
This register can only be written if the bits WPSWS5 and WPHWS5 are cleared in
page
• FPOL: Fault Polarity (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
• FMOD: Fault Activation Mode (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
• FFIL: Fault Filtering (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
CAUTION: To prevent an unexpected activation of the status flag FSy in the
bit FMODy can be set to “1” only if the FPOLy bit has been previously configured to its final value.
902
0 = The fault y becomes active when the fault input y is at 0.
1 = The fault y becomes active when the fault input y is at 1.
0 = The fault y is active as long as bit y of FPOL field is set.
1 = The fault y becomes active as soon as bit y of FPOL field is set. The fault y stays active until bit y of FPOL field is
unset AND until it is cleared in
0 = The fault input y is not filtered.
1 = The fault input y is filtered.
911.
31
23
15
7
SAM3S Preliminary
PWM Fault Mode Register
30
22
14
PWM_FMR
0x4002005C
6
Read-write
“PWM Fault Clear Register” on page
29
21
13
5
28
20
12
4
FMOD
FPOL
FFIL
–
27
19
11
3
904.
“PWM Fault Status Register” on page
“PWM Write Protect Status Register” on
26
18
10
2
25
17
9
1
6500C–ATARM–8-Feb-11
24
16
8
0
903, the