ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 43

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.4.3
6500C–ATARM–8-Feb-11
Core registers
decrements the stack pointer and then writes the item to the new memory location. The proces-
sor implements two stacks, the main stack and the process stack, with independent copies of
the stack pointer, see
In Thread mode, the CONTROL register controls whether the processor uses the main stack or
the process stack, see
uses the main stack. The options for processor operations are:
Table 10-1.
1.
The processor core registers are:
Processor
mode
Thread
Handler
Program Counter
Low registers
High registers
Stack Pointer
Link Register
See
“CONTROL register” on page
Summary of processor mode, execution privilege level, and stack use options
Used to
execute
Applications
Exception
handlers
“Stack Pointer” on page
FAULTMASK
“CONTROL register” on page
CONTROL
PRIMASK
BASEPRI
SP (R13)
LR (R14)
PC (R15)
PSR
R10
R11
R12
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Privilege level for
software execution
Privileged or
unprivileged
Always privileged
51.
General-purpose registers
Program status register
Exception mask registers
CONTROL register
PSP
(1)
44.
‡
51. In Handler mode, the processor always
MSP
SAM3S Preliminary
Stack used
Main stack or process
stack
Main stack
‡
(1)
Special registers
‡
Banked version of SP
43