ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 764

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.6.14.3
Figure 34-18. Rotation Change Detection
764
Direction Change under normal conditions
PHA
PHB
DIR
DIRCHG
No direction change due to particulate contamination masking a reflective bar
PHA
PHB
DIR
DIRCHG
SAM3S Preliminary
Direction Status and Change Detection
After filtering, the quadrature signals are analyzed to extract the rotation direction and edges of
the 2 quadrature signals detected in order to be counted by timer/counter logic downstream.
The direction status can be directly read at anytime on TC_QISR register. The polarity of the
direction flag status depends on the configuration written in TC_BMR register. INVA, INVB,
INVIDX, SWAP modify the polarity of DIR flag.
Any change in rotation direction is reported on TC_QISR register and can generate an interrupt.
The direction change condition is reported as soon as 2 consecutive edges on a phase signal
have sampled the same value on the other phase signal and there is an edge on the other sig-
nal. The 2 consecutive edges of 1 phase signal sampling the same value on other phase signal
is not sufficient to declare a direction change, for the reason that particulate contamination may
mask one or more reflective bar on the optical or magnetic disk of the sensor. (Refer to
34-18 ”Rotation Change Detection”
The direction change detection is disabled when QDTRANS is set to 1 in TC_BMR. In this case
the DIR flag report must not be used.
missing pulse
spurious change condition (if detected in a simple way)
same phase
change condition
for waveforms.)
Report Time
6500C–ATARM–8-Feb-11
Figure