ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 46

MCU AVR 128KB FLASH 16MHZ 64QFN

ATMEGA128-16MN

Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16MN

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Standby Mode
Extended Standby
Mode
Table 18. Active Clock Domains and Wake Up Sources in the Different Sleep Modes
Notes:
46
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
Extended
Standby
1. External Crystal or resonator selected as clock source
2. If AS
3. Only INT3:0 or level interrupt INT7:4
(1)
(1)
ATmega128
clk
CPU
0
bit in ASSR is set
Active Clock Domains
clk
FLASH
When the SM2..0 bits are 110 and an External Crystal/Resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in 6 clock cycles.
When the SM2..0 bits are 111 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Extended Standby mode. This mode is identical to
Power-save mode with the exception that the Oscillator is kept running. From Extended Standby
mode, the device wakes up in six clock cycles.
clk
X
IO
clk
X
X
ADC
clk
X
X
X
X
ASY
(2)
(2)
Main Clock
Enabled
Source
X
X
X
X
Oscillators
Enabled INT7:0
Timer
Osc
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
Address
Match
TWI
X
X
X
X
X
X
Wake Up Sources
Timer
X
X
X
X
(2)
(2)
0
EEPROM
Ready
SPM/
X
X
2467V–AVR–02/11
ADC
X
X
Other
I/O
X

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