ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 132

• Manufacturer Part Number: ATMEGA128-16MN
• Description: MCU AVR 128KB FLASH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16-bit
Timer/Counter
Register
Description
Timer/Counter1
Control Register A –
TCCR1A
Timer/Counter3
Control Register A –
TCCR3A
132
ATmega128
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•
•
The COMnA1:0, COMnB1:0, and COMnC1:0 control the output compare pins (OCnA, OCnB,
and OCnC respectively) behavior. If one or both of the COMnA1:0 bits are written to one, the
OCnA output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COMnB1:0 bits are written to one, the OCnB output overrides the normal port func-
tionality of the I/O pin it is connected to. If one or both of the COMnC1:0 bits are written to one,
the OCnC output overrides the normal port functionality of the I/O pin it is connected to. How-
ever, note that the Data Direction Register (DDR) bit corresponding to the OCnA, OCnB or
OCnC pin must be set in order to enable the output driver.
When the OCnA, OCnB or OCnC is connected to the pin, the function of the COMnx1:0 bits is
dependent of the WGMn3:0 bits setting.
the WGMn3:0 bits are set to a normal or a CTC mode (non-PWM).
Table 58. Compare Output Mode, non-PWM
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A
Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B
Bit 3:2 – COMnC1:0: Compare Output Mode for Channel C
COMnA1/COMnB1/
COMnC1
0
0
1
1
COM1A1
COM3A1
R/W
R/W
7
0
7
0
COM1A0
COM3A0
R/W
R/W
6
0
6
0
COMnA0/COMnB0/
COM1B1
COM3B1
COMnC0
R/W
R/W
5
0
5
0
0
1
0
1
COM1B0
COM3B0
R/W
R/W
4
0
4
0
Table 58
Description
Normal port operation, OCnA/OCnB/OCnC
disconnected.
Toggle OCnA/OCnB/OCnC on compare
match.
Clear OCnA/OCnB/OCnC on compare
match (set output to low level).
Set OCnA/OCnB/OCnC on compare match
(set output to high level).
COM3C1
COM1C1
R/W
R/W
3
0
3
0
shows the COMnx1:0 bit functionality when
COM1C0
COM3C0
R/W
R/W
2
0
2
0
WGM11
WGM31
R/W
R/W
1
0
1
0
WGM10
WGM30
R/W
R/W
0
0
0
0
TCCR1A
TCCR3A
2467V–AVR–02/11