ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 258

MCU AVR 128KB FLASH 16MHZ 64QFN

ATMEGA128-16MN

Manufacturer Part Number
ATMEGA128-16MN
Description
MCU AVR 128KB FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128-16MN

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Scanning the RESET
Pin
Scanning the Clock
Pins
258
ATmega128
Figure 126. Additional Scan Signal for the Two-wire Interface
The RESET pin accepts 5V active low logic for standard Reset operation, and 12V active high
logic for High Voltage Parallel programming. An observe-only cell as shown in
inserted both for the 5V Reset signal; RSTT, and the 12V Reset signal; RSTHV.
Figure 127. Observe-only Cell
The Atmel
Oscillator, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency
Crystal Oscillator, and Ceramic Resonator.
Figure 128
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/Clock out-
put is attached to an observe-only cell. In addition to the main clock, the Timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
®
shows how each Oscillator with external connection is supported in the scan chain.
AVR
®
Pxn
devices have many clock options selectable by fuses. These are: Internal RC
From system pin
previous
From
cell
ShiftDR
0
1
ClockDR
D
FF1
Slew-rate limited
Q
next
cell
To
SRC
To system logic
OCxn
ODxn
TWIEN
IDxn
PUExn
2467V–AVR–02/11
Figure 127
is

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