ATMEGA128-16MN Atmel, ATMEGA128-16MN Datasheet - Page 263

• Manufacturer Part Number: ATMEGA128-16MN
• Description: MCU AVR 128KB FLASH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128-16MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2467V–AVR–02/11
Table 104. Boundary-scan Signals for the ADC (Continued)
Note:
If the ADC is not to be used during scan, the recommended input values from
be used. The user is recommended not to use the Differential Gain stages during scan. Switch-
Cap based gain stages require fast operation and accurate timing which is difficult to obtain
when used in a scan chain. Details concerning operations of the differential gain stage is there-
fore not provided.
Signal
Name
MUXEN_7
MUXEN_6
MUXEN_5
MUXEN_4
MUXEN_3
MUXEN_2
MUXEN_1
MUXEN_0
NEGSEL_2
NEGSEL_1
NEGSEL_0
PASSEN
PRECH
SCTEST
ST
VCCREN
Incorrect setting of the switches in
part. There are several input choices to the S&H circuitry on the negative input of the output com-
parator in
reference source, or Ground.
Direction
as Seen
from the
ADC
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Figure
131. Make sure only one path is selected from either one ADC pin, Bandgap
Description
Input Mux bit 7
Input Mux bit 6
Input Mux bit 5
Input Mux bit 4
Input Mux bit 3
Input Mux bit 2
Input Mux bit 1
Input Mux bit 0
Input Mux for negative
input for differential signal,
bit 2
Input Mux for negative
input for differential signal,
bit 1
Input Mux for negative
input for differential signal,
bit 0
Enable pass-gate of gain
stages.
Precharge output latch of
comparator. (Active low)
Switch-cap TEST enable.
Output from x10 gain
stage send out to Port Pin
having ADC_4
Output of gain stages will
settle faster if this signal is
high first two ACLK
periods after AMPEN goes
high.
Selects Vcc as the ACC
reference voltage.
Figure 131
will make signal contention and may damage the
Recommended
Input
when not
in Use
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
ATmega128
Table 104
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
should
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