MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 55

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MC68HC908LD64
Freescale Semiconductor
Addr.
$006C
$006D
$006A
$006B
$0064
$0065
$0066
$0067
$0068
$0069
Multi-Master IIC Address
Master Control Register
Multi-Master IIC Control
OSD Column Address
High Byte Write Buffer
Register Name
OSD Row Address
OSD FLASH Even
Unimplemented
Multi-Master IIC
Multi-Master IIC
Status Register
Figure 2-2. Control, Status, and Data Registers (Sheet 11 of 15)
U = Unaffected
Port D Control
Port E Control
(OSDEHBUF)
—
(OSDRAR)
(OSDCAR)
(MMADR)
Rev. 3.0
(MIMCR)
(MMCR)
Register
Register
Register
Register
Register
Register
(MMSR)
(PDCR)
(PECR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read: MMALIF MMNAKIF
Write:
Read:
Write:
Read:
Write:
Read: MMRXIF
Write:
Write:
Write:
Write:
Write:
Write:
Write:
X = Indeterminate
IICDATE
MMAD7
DOT15
MMEN
Bit 7
0
0
0
1
0
0
0
IICSCLE DDCDATE DDCSCLE HOUTE
MMTXIF MMATCH MMSRW MMRXAK
MMAD6
MMIEN
DOT14
6
0
0
0
0
0
0
0
Memory Map
MMAD5
DOT13
MMBB
5
0
0
1
0
0
0
= Unimplemented
MMAST
MMAD4
COLA4
Unaffected by reset
DOT12
R
4
0
0
0
0
0
0
0
USBDS4E USBDS3E USBDS2E USBDS1E
MMTXAK
ROWA3
MMAD3
COLA3
MMRW
DOT11
3
0
0
0
0
0
0
0
1
ROWA2
MMBR2
MMAD2
VOUTE
COLA2
DOT10
Input/Output (I/O) Section
R
2
0
0
0
0
0
0
0
0
0
0
= Reserved
MMTXBE MMRXBF
MMBR1
MMAD1 MMEXTAD
ROWA1
COLA1
DOT9
DEE
1
0
0
0
0
0
0
0
0
1
Memory Map
Data Sheet
ROWA0
MMBR0
COLA0
DCLKE
DOT8
Bit 0
0
0
0
0
0
0
0
0
0
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