MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 215

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.7.5 USB Embedded Device Control Register 1 (DCR1)
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
Address:
T1SEQ — Embedded Device Endpoint 1/2 Transmit Sequence Bit
ENDADD — Endpoint Address Select
TX1E — Embedded Device Endpoint 1/2 Transmit Enable
Figure 14-17. USB Embedded Device Control Register 1 (DCR1)
Reset:
Read:
Write:
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed to
embedded device endpoint 1 or 2. Toggling of this bit must be
controlled by software. Reset clears this bit.
This read/write bit specifies whether the data inside the
DE1D0–DE1D7 registers are used for embedded device endpoint 1
or 2. If all the conditions for a successful endpoint 2 USB response to
a host’s IN token are satisfied (TXD1F=0, TX1E=1, DSTALL2=0, and
ENABLE2=1) except that the ENDADD bit is configured for
endpoint 1, the USB responds with a NAK handshake packet. Reset
clears this bit.
This read/write bit enables a transmit to occur when the USB Host
controller sends an IN token to endpoint 1 or endpoint 2 of the
embedded device. The appropriate endpoint enable bit, ENABLE1 or
ENABLE2 bit in the DCR2 register, should also be set. Software
should set the TX1E bit when data is ready to be transmitted.
1 = DATA1 token active for next embedded device endpoint 1/2
0 = DATA0 token active for next embedded device endpoint 1/2
1 = The data buffers are used for embedded device endpoint 2
0 = The data buffers are used for embedded device endpoint 1
T1SEQ
$004C
Bit 7
Universal Serial Bus Module (USB)
transmit
transmit
0
ENDADD
= Unimplemented
6
0
TX1E
5
0
4
0
0
Embedded Device Function I/O Registers
TP1SIZ3
Universal Serial Bus Module (USB)
3
0
TP1SIZ2
2
0
TP1SIZ1
1
0
Data Sheet
TP1SIZ0
Bit 0
0
215