MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 313

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.7.3 Port E Options
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
Address:
When bit DDREx is a logic 1, reading address $0008 reads the PTEx
data latch. When bit DDREx is a logic 0, reading address $0008 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port E pins.
The Port E control register (PECR) selects the port E pins for USB
module function or as standard I/O function.
USBDS4E–USBDS1E — USB HUB Data Pins Enable
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
Reset:
Read:
Write:
Setting a USBDSxE bit to logic 1 configures the corresponding
PTE/DPLUSx and PTE/DMINUSx pins for USB HUB downstream
port function. Reset clears the USBDSxE bits.
DDRE
Bit
0
1
1 = PTE/DPLUSx and PTE/DMINUSx pins configured as USB pins
0 = PTE/DPLUSx and PTE/DMINUSx pins configured as standard
$0068
Bit 7
I/O pins
Figure 19-20. Port E Control Register (PECR)
PTE Bit
Input/Output (I/O) Ports
= Unimplemented
X
X
(1)
6
Table 19-6. Port E Pin Functions
Input, Hi-Z
I/O Pin
Output
Mode
5
(2)
R
4
Read/Write
DDRE[7:0]
DDRE[7:0]
Accesses
to DDRE
USBDS4E USBDS3E USBDS2E USBDS1E
3
0
Table 19-6
PTE[7:0]
2
0
Read
Accesses to PTD
Input/Output (I/O) Ports
Pin
summarizes
1
0
PTE[7:0]
PTE[7:0]
Data Sheet
Write
Bit 0
Port E
0
(3)
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