MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 228

IC MCU 8BIT FOR LCD 64-QFP

MC908LD64IFUE

Manufacturer Part Number
MC908LD64IFUE
Description
IC MCU 8BIT FOR LCD 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LD64IFUE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
I²C, USB
Peripherals
OSD, POR, PWM
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LD
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, USB
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908LD64IFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC908LD64IFUE
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
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Quantity:
17
Multi-Master IIC Interface (MMIIC)
15.5.4 Multi-Master IIC Status Register (MMSR)
Data Sheet
228
Address:
MMRXIF — Multi-Master IIC Receive Interrupt Flag
Reset:
Read: MMRXIF
Write:
This flag is set after the data receive register (MMDRR) is loaded with
a new received data. Once the MMDRR is loaded with received data,
no more received data can be loaded to the MMDRR register until the
CPU reads the data from the MMDRR to clear MMRXBF flag.
MMRXIF generates an interrupt request to CPU if the MMIEN bit in
MMCR is also set. This bit is cleared by writing "0" to it or by reset; or
when the MMEN = 0.
1 = New data in data receive register (MMDRR)
0 = No data received
Figure 15-5. Multi-Master IIC Status Register (MMSR)
$006D
Bit 7
Multi-Master IIC Interface (MMIIC)
0
0
MMBR2
NOTE:
CPU bus clock is external clock ÷ 4 = 6MHz
0
0
0
0
1
1
1
1
= Unimplemented
MMTXIF MMATCH MMSRW MMRXAK
6
0
0
Table 15-2. Baud Rate Select
MMBR1
0
0
1
1
0
0
1
1
5
0
MMBR0
4
0
0
1
0
1
0
1
0
1
3
1
Baud Rate
MC68HC908LD64
46.875k
23.437k
11.719k
187.5k
93.75k
5.859k
750k
375k
Freescale Semiconductor
2
0
0
MMTXBE MMRXBF
1
1
Rev. 3.0
Bit 0
0

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