MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 283

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.8.2 Row Attribute Registers
18.8.3 Control, Window, and Pattern Registers
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
The 15 row attribute registers are at column 30 of the display rows.
These registers are memory mapped to RAM locations as illustrated in
Figure
When OSDMEN=0 (not displaying), CPU has direct access to these
registers by reading/writing the RAM locations. When OSDMEN=1
(displaying), CPU access these registers indirectly by writing to the OSD
data registers, row register and column register.
Each row attribute register affects characters of a display row.
Row 0–14, Column 30:
REN — Row Enable
CHS — Character Height
CWS — Character Width
Row-15 registers are for window, pattern, and miscellaneous control of
the entire OSD screen. These registers are NOT memory mapped to
RAM locations. CPU access these registers by writing to the OSD data
registers, row register and column register.
Set this bit to enable OSD circuitry to display the current row of
characters. This bit should be cleared when display RAM is accessed
directly by the CPU and when the row points to a font that is to be
updated in the FLASH font memory.
Set this bit to display double height characters for this row.
Set this bit to display double width characters for this row.
15
1 = Enable display for this row
0 = Disable display for this row
1 = Display characters as double height for this row
0 = Display characters as normal height for this row
1 = Display characters as double width for this row
0 = Display characters as normal width for this row
18-4.
14
13
On-Screen Display (OSD)
12
11
10
9
8
7
6
5
On-Screen Display (OSD)
4
3
REN
2
OSD Registers
CHS
1
Data Sheet
CWS
0
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