MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 341

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

MC68HC908LD64
Freescale Semiconductor
;
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
—
Rev. 3.0
5
6
SBSW,SBSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
Note: Writing a logic 0 clears SBSW.
Address:
SBSW — SIM Break Stop/Wait Bit
SBSW can be read within the break interrupt routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example.
Reset:
Read:
Write:
This status bit is useful in applications requiring a return to wait or stop
mode after exiting from a break interrupt. Clear SBSW by writing a
logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
$FE00
Bit 7
R
Figure 23-6. SIM Break Status Register (SBSR)
Break Module (BRK)
R
6
;
;
;If RETURNLO is not zero,
;then just decrement low byte.
;Else deal with high byte, too.
;Point to WAIT/STOP opcode.
;Restore H register.
See if wait mode or stop mode was exited by
break.
R
R
5
= Reserved
R
4
R
3
R
2
Break Module Registers
Break Module (BRK)
SBSW
Note
1
0
Data Sheet
Bit 0
R
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