MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 104

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Clock Generator Module (CGM)
8.5.4 Crystal Output Frequency Signal (OSCXCLK)
8.5.5 Crystal Reference Frequency Signal (OSCRCLK)
8.5.6 CGM Base Clock Output (DCLK1)
8.5.7 CGM CPU Interrupt (CGMINT)
8.6 CGM I/O Registers
Data Sheet
104
OSCXCLK is the crystal oscillator output signal. It runs at the full speed
of the crystal (f
circuit. The duty cycle of OSCXCLK is unknown and may depend on the
crystal and other external factors. Also, the frequency and amplitude of
OSCXCLK can be unstable at start-up.
OSCRCLK is the buffered version of OSCXCLK. It runs at the full speed
of the crystal (f
DCLK1 is the clock output of the CGM. This signal goes to the sync
processor, which generates the display clocks. DCLK1 is software
programmable to be either the oscillator output (OSCXCLK) or the VCO
clock (CGMVCLK).
CGMINT is the interrupt signal generated by the PLL lock detector.
The following registers control and monitor operation of the CGM:
•
•
•
•
PLL control register (PCTL)
PLL bandwidth control register (PBWC)
PLL programming register (PPG)
H & V sync output control register (HVOCR)
Clock Generator Module (CGM)
XCLK
XCLK
) and is generated directly from the crystal oscillator
) and provides the reference for the PLL circuit.
MC68HC908LD64
Freescale Semiconductor
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Rev. 3.0