AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 584

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25.6.12.2
Figure 25-53. Slave Node with Peripheral DMA Controller
25.6.13
25.6.14
32072G–11/2011
WRITE BUFFER
DA TA 0
DA TA N
|
|
|
|
Wake-up Request
Bus Idle Time-out
Slave Node Configuration
Peripheral DMA
Controller
In this mode, the Peripheral DMA Controller transfers only data. The user reads the Identifier
from LINIR, and selects LIN mode by writing to LINMR. When NACT=PUBLISH the data is in the
write buffer, while the read buffer contains the data when NACT=SUBSCRIBE.
IMPORTANT: if in slave mode, NACT is already configured correctly as PUBLISH, the LINMR
register must still be written with this value in order to set TXRDY, and to request the corre-
sponding Peripheral DMA Controller write transfer.
Any node in a sleeping LIN cluster may request a wake-up. By writing to the Wakeup Signal
Type bit (LINMR.WKUPTYP), the user can choose to send either a LIN 1.3 (WKUPTYP=1), or a
LIN 2.0 (WKUPTYP=0) compliant wakeup request. Writing a one to the Send LIN Wakeup Sig-
nal bit (CR.LINWKUP), transmits a wakeup, and when completed sets LINTC.
According to LIN 1.3, the wakeup request should be generated with the character 0x80 in order
to impose eight successive dominant bits.
According to LIN 2.0, the wakeup request is issued by forcing the bus into the dominant state for
250µs to 5ms. Sending the character 0xF0 does this, regardless of baud rate.
LIN bus inactivity should eventually cause slaves to time-out and enter sleep mode. LIN 1.3
specifies this to 25000 bit periods, whilst LIN 2.0 specifies 4seconds. For the time-out counter
operation see
Table 25-15. Receiver Time-out Values (RTOR.TO)
• Baud rate max = 20 kbit/s -> one bit period = 50µs -> five bit periods = 250µs
• Baud rate min = 1 kbit/s -> one bit period = 1ms -> five bit periods = 5ms
LIN Specification
P eriphe ral
TXRDY
2.0
1.3
bus
Section 25.6.3.11 ”Receiver Time-out” on page
CONTROLLER
USART LIN
19 200 bit/s
20 000 bit/s
Baud Rate
1 000 bit/s
2 400 bit/s
9 600 bit/s
-
READ BUFFER
DATA 0
DA TA N
|
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25 000 bit periods
Time-out period
4s
Peripheral DMA
Controller
562.
P eripheral
RXRDY
Bus
38 400
76 800
80 000
25 000
4 000
9 600
NACT = SUBSCRIBE
TO
CONTROLLER
USART LIN
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