AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 132

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11
12.4.5
12.4.6
32072G–11/2011
Quick Page Read
Write page buffer operations
The flash controller supports flash blocks with up to 2^21 word addresses, as displayed in
12-1. Reading the memory space between address pw and 2^21-1 returns an undefined result.
The User page is permanently mapped to word address 2^21.
Table 12-1.
Figure 12-1. Memory map for the Flash memories
Figure 12-2.
A dedicated command, Quick Page Read (QPR), is provided to read all words in an addressed
page. All bits in all words in this page are AND’ed together, returning a 1-bit result. This result is
placed in the Quick Page Read Result (QPRR) bit in Flash Status Register (FSR). The QPR
command is useful to check that a page is in an erased state. The QPR instruction is much
faster than performing the erased-page check using a regular software subroutine.
The internal memory area reserved for the embedded flash can also be written through a write-
only page buffer. The page buffer is addressed only by the address bits required to address w
words (since the page buffer is word addressable) and thus wrap around within the internal
memory area address space and appear to be repeated within it.
Memory type
Main array
User
User page addresses
2 ^ 2 1 + 1 2 8
A ll a d d r e s s e s a r e w o r d a d d r e s s e s
Start address, byte sized
0
2^23 = 8388608
p w - 1
2 ^ 2 1
p w
F la s h w it h
e x t r a p a g e
0
U n u s e d
U s e r p a g e
Size
pw words = 4pw bytes
128 words = 512 bytes
Figure
132

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