AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 168

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.6.5
14.6.5.1
14.6.5.2
32072G–11/2011
CompactFlash Support
I/O Mode, Common Memory Mode, Attribute Memory Mode
CFCE1 and CFCE2 signals
The External Bus Interface integrates circuitry that interfaces to CompactFlash devices.
The CompactFlash logic is driven by the SMC on the NCS[4] and/or NCS[5] address space.
Writing to the HMATRIX.SFR6.CS4A and/or HMATRIX.SFR6.CS5A bits the appropriate value
enables this logic. Access to an external CompactFlash device is then made by accessing the
address space reserved to NCS[4] and/or NCS[5].
Attribute Memory, Common Memory, I/O modes are supported but the signals _IOWR, _IOIS16
(I/O mode) are not handled.
Within the NCS[4] and/or NCS[5] address space, the current transfer address is used to distin-
guish I/O mode, common memory mode andattribute memory mode.
The different modes are accessed through a specific memory mapping as illustrated on
14-2 on page
as described in
Figure 14-2. CompactFlash Memory Mapping
Note:
Table 14-4.
To cover all types of access, the SMC must be alternatively set to drive 8-bit data bus or 16-bit
data bus. The odd byte access on the DATA[7:0] bus is only possible when the SMC is config-
CF Address Space
The ADDR[22] I/O line is used to drive the REG signal of the CompactFlash Device.
ADDR[23:21]
168. ADDR[23:21] bits of the transfer address are used to select the desired mode
CompactFlash Mode Selection
000
001
010
100
Table 14-4 on page
Offset 0x0080 0000
Offset 0x0040 0000
Offset 0x0020 0000
Offset 0x0000 0000
168.
I/O Mode (Read operations)
I/O Mode (Write operations)
Common Memory Mode Space
Attribute Memory Mode Space
Mode Base Address
Common Memory
Attribute Memory
(Read operations)
(Write operations)
I/O Mode Space
I/O Mode Space
Figure
168