AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 326

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 19-1.
19.9.1.2
19.9.1.3
32072G–11/2011
Transfer Type
1) Single Block or
last transfer of
multi-Block
2) Auto Reload
multi-block transfer
with contiguous
SAR
3) Auto Reload
multi-block transfer
with contiguous
DAR
4) Auto Reload
multi-block transfer
5) Single Block or
last transfer of
multi-block
6) Linked List
multi-block transfer
with contiguous
SAR
7) Linked List
multi-block transfer
with auto-reload
SAR
8) Linked List
multi-block transfer
with contiguous
DAR
9) Linked List
multi-block transfer
with auto-reload
DAR
10) Linked List
multi-block transfer
Contiguous Address Between Blocks
Auto-reloading of Channel Registers
Programming of Transfer Types and Channel Register Update Method (DMACA State Machine Table)
LLP.
LOC
= 0
Yes
Yes
Yes
Yes
No
No
No
No
No
No
During auto-reloading, the channel registers are reloaded with their initial values at the comple-
tion of each block and the new values used for the new block. Depending on the row number in
Table 19-1 on page
reloaded from their initial value at the start of a block transfer.
In this case, the address between successive blocks is selected to be a continuation from the
end of the previous block. Enabling the source or destination address to be contiguous between
LLP_S_EN
(
CTLx)
0
0
0
0
0
0
0
1
1
1
RELOAD
_SR
(
CFGx)
0
0
1
1
0
0
1
0
0
0
326, some or all of the SARx, DARx and CTLx channel registers are
LLP_D_EN
(
CTLx)
0
0
0
0
0
1
1
0
0
1
RELOAD_
DS
(
CFGx)
0
1
0
1
0
0
0
0
1
0
CTLx,
LLPx
Update
Method
None, user
reprograms
CTLx,LLPx are
reloaded from
initial values.
CTLx,LLPx are
reloaded from
initial values.
CTLx,LLPx are
reloaded from
initial values.
None, user
reprograms
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
SARx
Update
Method
None (single)
Contiguous
Auto-Reload
Auto-Reload
None (single)
Contiguous
Auto-Reload
Linked List
Linked List
Linked List
DARx
Update
Method
None
(single)
Auto-
Reload
Con-
tiguous
Auto-
Reload
None
(single)
Linked
List
Linked
List
Con-
tiguous
Auto-
Reload
Linked
List
Write
Back
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
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