Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 38

• Manufacturer Part Number: Z8F08200100KIT
• Description: DEV KIT FOR Z8 ENCORE 4K TO 8K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KIT

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Data Bus Width: 8 bit
• Interface Type: RS-485
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3183

I2C Baud Rate Generator High Byte
I2CBRH (F53H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
I2C Baud Rate Generator Low Byte
I2CBRL (F54H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
SPI Data
SPIDATA (F60H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
PS022517-0508
I2C Baud Rate divisor [15:8]
I2C Baud Rate divisor [7:0]
SPI Data [7:0]
SPI Control
SPICTL (F61H - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
Z8 Encore! XP
SPI Enable
Master Mode Enabled
mode
mode
Wire-OR (open-drain) Mode
configured for
MISO, and
open-drain
Clock Polarity
Phase Select
of the data
BRG Timer Interrupt Request
disabled
enabled
Start an SPI Interrupt Request
interrupt request
Interrupt Request Enable
are disabled
are enabled
1 = BRG time-out interrupt is
0 = SPI disabled
1 = SPI enabled
0 = SPI configured in Slave
1 = SPI configured in Master
0 = SPI signals not
1 = SPI signals (SCK, SS,
0 = SCK idles Low
1 = SPI idles High
Sets the phase relationship
to the clock.
0 = BRG timer function is
0 = No effect
1 = Generate an SPI
0 = SPI interrupt requests
1 = SPI interrupt requests
Product Specification
open-drain
MOSI) configured for
Control Register Summary
®
F0822 Series
25