Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 87

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Z8F08200100KIT

Manufacturer Part Number
Z8F08200100KIT
Description
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F08200100KIT

Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Data Bus Width
8 bit
Interface Type
RS-485
Silicon Manufacturer
Zilog
Core Architecture
Z8 Encore
Silicon Core Number
Z8F0822SJ020
Silicon Family Name
XP F0822
For Use With/related Products
Z8 Encore!™
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3183
PS022517-0508
3. Write to the PWM High and Low Byte registers to set the PWM value.
4. Write to the Timer Reload High and Low Byte Registers to set the Reload value
5. If required, enable the timer interrupt and set the timer interrupt priority by writing to
6. Configure the associated GPIO port pin for the Timer Output alternate function.
7. Write to the Timer Control Register to enable the timer and initiate counting.
The PWM period is given by the following equation.
If an initial starting value other than
Registers, the ONE-SHOT mode equation is used to determine the first PWM time-out
period.
If
If
CAPTURE Mode
In CAPTURE mode, the current timer count value is recorded when the desired external
Timer Input transition occurs. The Capture count value is written to the Timer PWM High
and Low Byte Registers. The timer input is the system clock. The
Control Register determines if the Capture occurs on a rising edge or a falling edge of the
Timer Input signal. When the Capture event occurs, an interrupt is generated and the timer
continues counting.
The timer continues counting up to the 16-bit Reload value stored in the Timer Reload
High and Low Byte registers. Upon reaching the Reload value, the timer generates an
interrupt and continues counting.
Follow the steps below for configuring a timer for CAPTURE mode and initiating the
count:
1. Write to the Timer Control Register to:
PWM Period (s)
PWM Output High Time Ratio (%)
PWM Output High Time Ratio (%)
TPOL
TPOL
(PWM period). The Reload value must be greater than the PWM value.
the relevant interrupt registers.
Disable the timer
is set to 0, the ratio of the PWM output High time to the total period is given by
is set to 1, the ratio of the PWM output High time to the total period is given by
=
------------------------------------------------------------------------------ -
System Clock Frequency (Hz)
Reload Value
=
=
0001H
x
----------------------------------- - x100
Reload Value
Prescale
Reload Value PWM Value
------------------------------------------------------------------------ -x100
PWM Value
is loaded into the Timer High and Low Byte
Reload Value
Z8 Encore! XP
Product Specification
TPOL
bit in the Timer
®
F0822 Series
Timers
74

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