Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 17
Z8F08200100KIT
Manufacturer Part Number
Z8F08200100KIT
Description
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F08200100KIT
Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Data Bus Width
8 bit
Interface Type
RS-485
Silicon Manufacturer
Zilog
Core Architecture
Z8 Encore
Silicon Core Number
Z8F0822SJ020
Silicon Family Name
XP F0822
For Use With/related Products
Z8 Encore!™
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3183
- Current page: 17 of 264
- Download datasheet (6Mb)
PS022517-0508
General Purpose Input/Output
Flash Controller
10-Bit Analog-to-Digital Converter
UART
The eZ8 CPU features include:
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•
•
•
•
•
•
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For more information regarding the eZ8 CPU, refer to eZ8 CPU Core User Manual
(UM0128) available for download at www.zilog.com.
Z8 Encore! XP
Input/Output (GPIO). The number of GPIO pins available is a function of package. Each
pin is individually programmable. Ports A and C supports 5 V-tolerant inputs.
The Flash Controller programs and erases the Flash memory.
The optional Analog-to-Digital Converter (ADC) converts an analog input signal to a
10-bit binary number. The ADC accepts inputs from 2 to 5 different analog input sources.
The Universal Asynchronous Receiver/Transmitter (UART) is full-duplex and capable of
handling asynchronous data transfers. The UART supports 8-bit and 9-bit data modes and
selectable parity.
Direct register-to-register architecture allows each register to function as an
accumulator, improving execution time and decreasing the required Program Memory.
Software stack allows much greater depth in subroutine calls and interrupts than
hardware stacks.
Compatible with existing Z8
Expanded internal Register File allows access of up to 4 KB.
New instructions improve execution efficiency for code developed using higher-level
programming languages, including C.
Pipelined instruction fetch and execution.
New instructions for improved performance including BIT, BSWAP, BTJ, CPC, LDC,
LDCI, LEA, MULT, and SRL.
New instructions support 12-bit linear addressing of the Register File.
Up to 10 MIPS operation.
C-Compiler friendly.
2 to 9 clock cycles per instruction.
®
F0822 Series features 11 to 19 port pins (Ports A–C) for General Purpose
®
code.
Z8 Encore! XP
Product Specification
®
F0822 Series
Introduction
4
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