Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 75

• Manufacturer Part Number: Z8F08200100KIT
• Description: DEV KIT FOR Z8 ENCORE 4K TO 8K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KIT

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Data Bus Width: 8 bit
• Interface Type: RS-485
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3183

Table 26. Interrupt Request 1 Register (IRQ1)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Interrupt Request 1 Register
7
PA7I
U0RXI—UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service.
U0TXI—UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service.
I 2 CI— I
0 = No interrupt request is pending for the I
1 = An interrupt request from the I
SPII—SPI Interrupt Request
0 = No interrupt request is pending for the SPI.
1 = An interrupt request from the SPI is awaiting service.
ADCI—ADC Interrupt Request
0 = No interrupt request is pending for the ADC.
1 = An interrupt request from the ADC is awaiting service.
The Interrupt Request 1 (IRQ1) Register
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ1 register becomes 1. If interrupts are globally enabled
(vectored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU.
If interrupts are globally disabled (polled interrupts), the eZ8 CPU reads the IRQ1
Register to determine if any interrupt requests are pending.
PAxI—Port A Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port A pin x.
1 = An interrupt request from GPIO Port A pin x is awaiting service.
Where x indicates the specific GPIO Port pin number (0 through 7).
6
2
PA6I
C Interrupt Request
5
PA5I
4
PA4I
2
C is awaiting service.
FC3H
R/W
(Table
0
3
2
C.
PA3I
26) stores interrupt requests for both
2
Z8 Encore! XP
PA2I
Product Specification
PA1I
1
®
Interrupt Controller
F0822 Series
PA0I
0
62