Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 130

• Manufacturer Part Number: Z8F08200100KIT
• Description: DEV KIT FOR Z8 ENCORE 4K TO 8K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KIT

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Data Bus Width: 8 bit
• Interface Type: RS-485
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3183

PS022517-0508
Input Sample Time
(CLKPOL = 0)
(CLKPOL = 1)
Transfer Format PHASE is 0
Figure 23
to 0. The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL
set to one. The diagram can be interpreted as either a Master or Slave timing diagram since
the SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly
connected between the Master and the Slave.
Transfer Format PHASE is 1
Figure 24
waveforms are depicted for SCK, one for CLKPOL reset to 0 and another for CLKPOL
set to 1.
MOSI
MISO
SCK
SCK
SS
displays the timing diagram for an SPI transfer in which PHASE is cleared
displays the timing diagram for an SPI transfer in which PHASE is one. Two
Bit7
Bit7
Figure 23. SPI Timing When PHASE is 0
Bit6
Bit6
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
Bit2
Bit2
Z8 Encore! XP
Bit1
Bit1
Product Specification
Serial Peripheral Interface
Bit0
Bit0
®
F0822 Series
117