Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 177

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Z8F08200100KIT

Manufacturer Part Number
Z8F08200100KIT
Description
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F08200100KIT

Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Data Bus Width
8 bit
Interface Type
RS-485
Silicon Manufacturer
Zilog
Core Architecture
Z8 Encore
Silicon Core Number
Z8F0822SJ020
Silicon Family Name
XP F0822
For Use With/related Products
Z8 Encore!™
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3183
Table 89. Option Bits at Flash Memory Address 0000H for 8K Series Flash Devices
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Note: U = Unchanged by Reset. R/W = Read/Write.
Flash Memory Address 0000H
WDT_RES
WDT_RES—Watchdog Timer Reset
0 = Watchdog Timer time-out generates an interrupt request. Interrupts must be
1 = Watchdog Timer time-out causes a Reset. This setting is the default for
WDT_AO—Watchdog Timer Always On
0 = Watchdog Timer is automatically enabled upon application of system power.
1 = Watchdog Timer is enabled upon execution of the WDT instruction. Once enabled,
OSC_SEL[1:0]—OSCILLATOR Mode Selection
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators
11 = Maximum power for use with high frequency crystals (8.0 MHz to 20.0 MHz).
VBO_AO—Voltage Brownout Protection Always On
0 = Voltage Brownout Protection is disabled in STOP mode to reduce total power
1 = Voltage Brownout Protection is always enabled including during STOP mode.
RP—Read Protect
0 = User program code is inaccessible. Limited control features are available through
1 = User program code is accessible. All OCD commands are enabled.
7
Watchdog Timer can not be disabled.
the OCD.
globally enabled for the eZ8 CPU to acknowledge the interrupt request.
unprogrammed (erased) Flash.
consumption.
This setting is the default for unprogrammed (erased) Flash.
This setting is the default for unprogrammed (erased) Flash.
the Watchdog Timer can only be disabled by a Reset or Stop Mode Recovery.
This setting is the default for unprogrammed (erased) Flash.
(0.5 MHz to 10.0 MHz).
This setting is the default for unprogrammed (erased) Flash.
WDT_AO
6
OSC_SEL[1:0]
5
Program Memory 0000H
4
R/W
U
VBO_AO
3
Z8 Encore! XP
RP
2
Product Specification
Reserved
®
1
F0822 Series
Option Bits
FWP
0
164

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