Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 174

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Z8F08200100KIT

Manufacturer Part Number
Z8F08200100KIT
Description
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F08200100KIT

Contents
Evaluation Board, Cable, Power Supply, Software and Documentation
Data Bus Width
8 bit
Interface Type
RS-485
Silicon Manufacturer
Zilog
Core Architecture
Z8 Encore
Silicon Core Number
Z8F0822SJ020
Silicon Family Name
XP F0822
For Use With/related Products
Z8 Encore!™
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3183
Table 86. Flash Sector Protect Register (FPROT)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
R/W1 = Register is accessible for Read operations. Register can be written to 1 only (using user code).
Flash Sector Protect Register
Flash Frequency High and Low Byte Registers
Caution:
SECT7
7
INFO_EN—Information Area Enable
0 = Information Area is not selected.
1 = Information Area is selected. The Information area is mapped into the
PAGE—Page Select
This 7-bit field selects the Flash memory page for Programming and Page Erase
operations. Flash Memory Address[15:9] = PAGE[6:0].
The Flash Sector Protect Register
programmed or erased from user code. The Flash Sector Protect Register shares its
Register File address with the Page Select Register. The Flash Sector Protect Register can
be accessed only after writing the Flash Control Register with
write bits in this register to 1 (bits cannot be cleared to 0 by user code).
SECTn—Sector Protect
0 = Sector n can be programmed or erased from user code.
1 = Sector n is protected and cannot be programmed or erased from user code.
The Flash Frequency High and Low Byte Registers
form a 16-bit value, FFREQ, to control timing for Flash program and erase operations.
The 16-bit Flash Frequency registers must be written with the system clock frequency in
kHz for Program and Erase operations. The Flash Frequency value is calculated using the
following equation:
User code can only write bits from 0 to 1.
FFREQ[15:0]
Flash Memory address space at addresses
Flash programming and erasure is not supported for system clock frequen-
cies below 20 kHz, above 20 MHz, or outside of the valid operating
SECT6
6
=
{
FFREQH[7:0],FFREQL[7:0]
SECT5
5
SECT4
(Table
4
R/W1
FF9H
86) protects Flash memory sectors from being
0
SECT3
FE00H
}
3
=
System Clock Frequency
----------------------------------------------------------------- -
(Table 87
through
Z8 Encore! XP
SECT2
2
1000
and
FFFFH
5EH
Product Specification
Table
. User code can only
SECT1
.
1
®
88) combine to
F0822 Series
Flash Memory
SECT0
0
161

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