Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 11

• Manufacturer Part Number: Z8F08200100KIT
• Description: DEV KIT FOR Z8 ENCORE 4K TO 8K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KIT

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Data Bus Width: 8 bit
• Interface Type: RS-485
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3183

PS022517-0508
Braces
The curly braces { }, indicate a single register or bus created by concatenating some com-
bination of smaller registers, buses, or individual bits.
•
Parentheses
The parentheses ( ), indicate an indirect register address lookup.
•
Parentheses/Bracket Combinations
The parentheses ( ), indicate an indirect register address lookup and the square brackets,
[ ], indicate a register or bus.
•
Use of the Words Set, Reset and Clear
The word set implies that a register bit or a condition contains a logical 1. The words reset
or clear imply that a register bit or a condition contains a logical 0. When either of these
terms is followed by a number, the word logical cannot be included; however, it is
implied.
Notation for Bits and Similar Registers
A field of bits within a register is designated as: Register[n:n].
•
Use of the Terms LSB, MSB, lsb, and msb
In this document, the terms LSB and MSB, when appearing in upper case, mean least
significant byte and most significant byte, respectively. The lowercase forms, lsb and msb,
mean least significant bit and most significant bit, respectively.
Use of Initial Uppercase Letters
Initial uppercase letters designate settings and conditions in general text.
•
•
Example: The 12-bit register address {
hexadecimal value (
(RP) and Working Register R1.
12-bit register, and R1[3:0] is the least significant nibble of the 12-bit register.
Example: (R1) is the memory location referenced by the address contained in the
Working Register R1.
Example: Assume PC[15:0] contains the value
contents of the memory location at address
Example: ADDR[15:0] refers to bits 15 through bit 0 of the Address.
Example 1: The receiver forces the SCL line to Low.
Example 2: The Master generates a STOP condition to abort the transfer.
0H
) and two 4-bit register values taken from the Register Pointer
0H
is the most significant nibble (4-bit value) of the
0H
, RP[7:4], R1[3:0]} is composed of a 4-bit
1234h
1234h
.
Z8 Encore! XP
. (PC [15:0]) then refers to the
Product Specification
®
F0822 Series
Introduction
xi