Z8F08200100KIT Zilog, Z8F08200100KIT Datasheet - Page 106

• Manufacturer Part Number: Z8F08200100KIT
• Description: DEV KIT FOR Z8 ENCORE 4K TO 8K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KIT

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Data Bus Width: 8 bit
• Interface Type: RS-485
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3183

PS022517-0508
Receiving Data using the Polled Method
The UART is now configured for interrupt-driven data transmission. Because the UART
Transmit Data Register is empty, an interrupt is generated immediately. When the UART
Transmit Interrupt is detected, the associated ISR performs the following:
1. Write the UART Control 1 Register to select the outgoing address bit:
2. Write the data byte to the UART Transmit Data Register. The transmitter
3. Clear the UART Transmit Interrupt bit in the applicable Interrupt Request Register.
4. Execute the
Follow the steps below to configure the UART for polled data reception:
1. Write to the UART Baud Rate High and Low Byte Registers to set the required
2. Enable the UART pin functions by configuring the associated GPIO Port pins for
3. Write to the UART Control 1 Register to enable Multiprocessor mode functions, if
4. Write to the UART Control 0 Register to:
5. Check the
6. Read data from the UART Receive Data Register. If operating in Multiprocessor
7. Return to
–
automatically transfers data to the Transmit Shift Register and then transmits the data.
Register to again become empty.
baud rate.
alternate function operation.
desired.
–
–
Register contains a valid data byte (indicated by 1). If RDA is set to 1 to indicate
available data, continue to
a 0), continue to monitor the RDA bit awaiting reception of the valid data.
(9-bit) mode, further actions may be required depending on the Multiprocessor Mode
bits MPMD[1:0].
Set the Multiprocessor Bit Transmitter (MPBT) if sending an address byte, clear it
if sending a data byte.
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if required, and if MULTIPROCESSOR mode is not enabled, and
select either even or odd parity.
step 5
RDA
IRET
bit in the UART Status 0 Register to determine if the Receive Data
to receive additional data.
instruction to return from the ISR and waits for the Transmit Data
step
6. If the Receive Data Register is empty (indicated by
Universal Asynchronous Receiver/Transmitter
Z8 Encore! XP
Product Specification
®
F0822 Series
93