Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 87

• Manufacturer Part Number: Z8FMC04100
• Description: Z8 Encore-R Motor Control Flash MCUs
• Manufacturer: ZILOG [Zilog, Inc.]

PS024604-1005
Watch-Dog Timer Reload Unlock Sequence
Watch-Dog Timer Reload High and Low Byte Registers
Following completion of the Stop-Mode Recovery the eZ8 CPU responds to the system
exception request by fetching the System Exception vector and executing code from the
vector address.
WDT Reset in Normal Operation
If configured to generate a Reset when a time-out occurs, the Watch-Dog Timer forces the
device into the Reset state. The WDT status bit in the
set to 1. Refer to the
tion on Reset and the
tialized with its reset value.
WDT Reset in Stop Mode
If enabled in STOP mode and configured to generate a Reset when a time-out occurs and
the device is in STOP mode, the Watch-Dog Timer initiates a Stop-Mode Recovery. Both
the WDT status bit and the STOP bit in the
following WDT time-out in STOP mode. Refer to the
chapter on page 23 for more information.
Writing the unlock sequence to the Watch-Dog Timer Reload High (WDTH) Register
address unlocks the two Watch-Dog Timer Reload registers (WDTH and WDTL) to allow
changes to the time-out period. These write operations to the WDTH register address pro-
duce no effect on the bits in the WDTH register. The locking mechanism prevents spurious
writes to the Reload registers. The following sequence is required to unlock the Watch-
Dog Timer Reload registers (WDTH and WDTL) for write access.
1. Write
2. Write
3. Write the appropriate value to the Watch-Dog Timer Reload High register (WDTH).
4. Write the appropriate value to the Watch-Dog Timer Reload Low register (WDTL).
All steps of the Watch-Dog Timer Reload Unlock sequence must be written in the order
just listed. The value in the Watch-Dog Timer Reload registers is loaded into the counter
every time a
The Watch-Dog Timer Reload High and Low Byte (WDTH, WDTL) registers, shown in
Table 40 through Table 41, form the 16-bit reload value that is loaded into the Watch-Dog
Timer when a
WDTL[7:0]}. Writing to these registers following the unlock sequence sets the appropri-
55H
AAH
WDT
WDT
to the Watch-Dog Timer Reload High register (WDTH).
to the Watch-Dog Timer Reload High register (WDTH).
instruction is executed.
instruction executes. The 16-bit reload value is {WDTH[7:0],
Reset and Stop-Mode Recovery
WDT
status bit. Following a Reset sequence, the WDT Counter is ini-
P R E L I M I N A R Y
Reset Status and Control Register
Watch-Dog Timer Reload Unlock Sequence
Reset Status and Control Register
chapter on page 23 for more informa-
Z8FMC16100 Series Flash MCU
Reset and Stop-Mode Recovery
Product Specification
are set to 1
is
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