Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 223

• Manufacturer Part Number: Z8FMC04100
• Description: Z8 Encore-R Motor Control Flash MCUs
• Manufacturer: ZILOG [Zilog, Inc.]

PS024604-1005
SAMPLE/HOLD
Internal signal
Internal signal
Caution:
START bit
ADC Timing
BUSY
To avoid disrupting a conversion already in progress, the
ADC operation status (busy or available).
Each ADC measurement consists of 3 phases:
1. Input sampling (programmable, minimum of 1.0 µs)
2. Sample-and-hold amplifier settling (programmable, minimum of 0.5 µs)
3. Conversion is 13 ADCLK cycles.
Figure 37 illustrates the control and flow of an ADC conversion.
Starting a new conversion while another conversion is in progress will stop the conver-
sion in progress and the new conversion will not complete.
Set by user
1.0 s sample period
Figure 37. ADC Timing Diagram
P R E L I M I N A R Y
Programmable
settling period
Z8FMC16100 Series Flash MCU
Conversion period
START
bit can be read to indicate
Product Specification
Cleared by BUSY
Conversion period
13-clock
ADC Timing
201