Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 160
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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Z8 Encore!
Product Specification
LIN-UART
RESET
FIELD
ADDR
BITS
R/W
®
NFEN
R/W
Motor Control Flash MCUs
7
0
Table 73. Noise Filter Control Register (U0CTL1 with MSEL = 001b)
Noise Filter Control Register
When MSEL =
for the digital noise filter. A more detailed discussion of each bit follows the table.
NFEN—Noise Filter Enable
0 = Noise filter is disabled.
1 = Noise filter is enabled. Receive data is preprocessed by the noise filter.
NFCTL—Noise Filter Control
This field controls the delay and noise rejection characteristics of the noise filter. The
wider the counter the more delay that is introduced by the filter and the wider the noise
event that is filtered.
000 = 4-bit up/down counter
001 = 5-bit up/down counter
010 = 6-bit up/down counter
011 = 7-bit up/down counter
100 = 8-bit up/down counter
101 = 9-bit up/down counter
110 = 10-bit up/down counter
111 = 11-bit up/down counter
LIN Control Register
When
ation. A more detailed discussion of each bit follows the table.
MSEL
R/W
6
0
=
010b
001b
, the LIN Control Register provides control for the LIN mode of oper-
NFCTL
, the Noise Filter Control Register, shown in Table , provides control
R/W
5
0
P R E L I M I N A R Y
F43H with MSEL = 001b
R/W
4
0
R
3
0
R
2
0
Reserved
R
1
0
PS024604-1005
R
0
0
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