Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 102
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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Z8 Encore!
Product Specification
Pulse-Width Modulator
Bit
Position
[7:6]
RLFREQ[1:0]
[5]
INDEN
[4]
Pol2
[3]
Pol1
[2]
Pol0
RESET
FIELD
ADDR
BITS
R/W
PWM Control 1 Register
®
Motor Control Flash MCUs
RLFREQ[1:0]
7
Table 49. PWM Control 1 Register (PWMCTL1)
Value
(H)
00
01
10
11
0
1
1
0
1
0
1
0
The PWM Control 1 (PWMCTL1) Register, shown in Table 49, controls portions of PWM
operation.
R/W
00
Description
Reload Event Frequency
This bit field is buffered. Changes to the reload event frequency takes effect at
the end of the current PWM period. Reads always return the bit values from the
temporary holding register.
PWM reload event occurs at the end of every PWM period.
PWM reload event occurs once every 2 PWM periods.
PWM reload event occurs once every 4 PWM periods.
PWM reload event occurs once every 8 PWM periods.
Independent PWM Mode Enable
This bit may only be altered when PWEN (PWMCTL0) cleared.
PWM outputs operate as 3 complementary pairs.
PWM outputs operate as 6 independent channels.
Invert Ouput polarity for channel pair PWM2.
Non-inverted polarity for channel pair PWM2.
Invert Ouput polarity for channel pair PWM1.
Non-inverted polarity for channel pair PWM1.
Invert Ouput polarity for channel pair PWM0.
Non-inverted polarity for channel pair PWM0.
6
INDEN
R/W
5
0
P R E L I M I N A R Y
Pol45
R/W
4
0
F21H
Pol23
R/W
3
0
Pol10
R/W
2
0
1
PRES[1:0]
PS024604-1005
R/W
00
0
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