Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 228
Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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Z8 Encore!
Product Specification
BITS
FIELD
RESET
R/W
ADDR
Analog-to-Digital Converter
Bit
Position
[7:5]
[4:0]
SST
Sample Settling Time Register
Sample Time Register
®
Value
(H)
0H
0H - FH
Motor Control Flash MCUs
7
Table 108. Sample and Settling Time (ADCSST)
The Sample Settling Time Register, shown in Table 108, is used to program the length of
time from the SAMPLE/HOLD signal to the START signal, when the conversion can
begin. The number of clock cycles required for settling will vary from system to system
depending on the system clock period used. The system designer should program this reg-
ister to contain the number of clocks required to meet a 0.5 µs minimum settling time.
The Sample Time Register, shown in Table 109, is used to program the length of active
time for the sample after a conversion has begun by setting the START bit in the ADC
Control Register or initiated by the PWM. The number of system clock cycles required for
sample time varies from system to system, depending on the clock period used. The sys-
tem designer should program this register to contain the number of system clocks required
to meet a 1 µs minimum sample time.
Reserved
Description
Reserved - Must be 0.
Sample settling time in number of system clock periods to meet 0.5
R
6
0
5
P R E L I M I N A R Y
4
1
F74H
3
1
SST
R/W
2
1
1
1
PS024604-1005
µ
S minimum.
0
1
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