Z8FMC04100 ZILOG [Zilog, Inc.], Z8FMC04100 Datasheet - Page 158
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Z8FMC04100
Manufacturer Part Number
Z8FMC04100
Description
Z8 Encore-R Motor Control Flash MCUs
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8FMC04100.pdf
(402 pages)
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Z8 Encore!
Product Specification
LIN-UART
RESET
FIELD
ADDR
BITS
R/W
LIN-UART Control 1 Registers
MPMD[1]
®
R/W
Motor Control Flash MCUs
7
0
Table 72. MultiProcessor Control Register (U0CTL1 with MSEL = 000b)
of the LIN Control register. One or two stop bits are automatically provided by the hard-
ware in LIN mode as defined by the
0 = No break is sent.
1 = The output of the transmitter is 0.
STOP—Stop Bit Select
0 = The transmitter sends one stop bit.
1 = The transmitter sends two stop bits.
LBEN—Loop Back Enable
0 = Normal operation.
1 = All transmitted data is looped back to the receiver within the IrDA module.
Multiple registers, shown in Tables 72 through 74) are accessible by a single bus address.
The register selected is determined by the Mode Select (MSEL) field. These registers pro-
vide additional control over LIN-UART operation.
Multiprocessor Control Register
control for UART multiprocessor mode, IRDA mode, baud rate timer mode as well as other
features that may apply to multiple modes. A more detailed discussion of each bit follows
the table.
MPMD[1:0]—Multiprocessor Mode
If MULTIPROCESSOR (9-bit) mode is enabled,
00 = The LIN-UART generates an interrupt request on all received bytes (data and
address).
01 = The LIN-UART generates an interrupt request only on received address bytes.
10 = The LIN-UART generates an interrupt request when a received address byte matches
the value stored in the Address Compare Register and on all successive data bytes until an
address mismatch occurs.
When MSEL =
MPEN
R/W
6
0
000b
MPMD[0]
, the Multiprocessor Control Register, shown in Table 72, provides
R/W
5
0
P R E L I M I N A R Y
F43H with MSEL = 000b
MPBT
R/W
4
0
STOP
bit.
DEPOL
R/W
3
0
BRGCTL
R/W
2
0
RDAIRQ
R/W
1
0
PS024604-1005
IREN
R/W
0
0
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