AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 706

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AT32UC3L064_1

Manufacturer Part Number
AT32UC3L064_1
Description
AVR32 32-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
29.4
29.5
29.5.1
29.5.2
29.5.3
29.6
29.6.1
32099A–AVR32–06/09
I/O Lines Description
Product Dependencies
Functional Description
I/O Lines
Clocks
Debug Operation
Enabling the Lookup Table Inputs
Table 29-1.
Each LUT have 4 inputs and one output. The inputs and outputs for the LUTs are mapped
sequentially to the inputs and outputs. This means that LUT0 is connected to IN0 to IN3 and
OUT0. LUT1 is connected to IN4 to IN7 and OUT1. In general, LUTn is connected to IN[4n] to
IN[4n+3] and OUTn.
In order to use this module, other parts of the system must be configured correctly, as described
below.
The pins used for interfacing the GLOC may be multiplexed with I/O Controller lines. The pro-
grammer must first program the I/O Controller to assign the desired GLOC pins to their
peripheral function. If I/O lines of the GLOC are not used by the application, they can be used for
other purposes by the I/O Controller.
It is only required to enable the GLOC input and outputs actually in use.
The clock for the GLOC bus interface (CLK_GLOC) is generated by the Power Manager. This
clock is enabled at reset, and can be disabled in the Power Manager. It is recommended to dis-
able the GLOC before disabling the clock, to avoid freezing the module in an undefined state.
Additionally, the GLOC depends on a dedicated Generic Clock (GCLK). The GCLK can be set to
a wide range of frequencies and clock sources, and must be enabled by the System Control
Interface (SCIF) before the GLOC filter can be used.
When an external debugger forces the CPU into debug mode, the GLOC continues normal
operation.
Since the inputs to each lookup table (LUT) unit can be multiplexed with other peripherals, each
input must be explicitly enabled by writing a one to the corresponding enable bit (AEN) in the
corresponding Lookup Table Control Register ( LUTCR).
If no inputs are enabled, the output OUTn will be the least significant bit in the TRUTHn register.
Pin Name
IN0-INm
OUT0-OUTn
I/O Lines Description
Output from lookup tables
Pin Description
Inputs to lookup tables
Type
Input
Output
AT32UC3L
706

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