AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 385

no-image

AT32UC3L064_1

Manufacturer Part Number
AT32UC3L064_1
Description
AVR32 32-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
20.7.3.3
20.7.3.4
Figure 20-11. Receiver Status
32099A–AVR32–06/09
Baud Rate
RXRDY
OVRE
Clock
Read
Write
Synchronous Receiver
Receiver Operations
RHR
RXD
CR
Start
Bit
D0
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start. All data bits, the parity
bit and the stop bits are sampled and the receiver waits for the next start bit. Synchronous mode
operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Figure 20-10 on page 385
Figure 20-10. Synchronous Mode Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register
(RHR) and the RXRDY bit in the Status Register (CSR) rises. If a character is completed while
the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is transferred into
RHR and overwrites the previous one. The OVRE bit is cleared by writing the Control Register
(CR) with the RSTSTA (Reset Status) bit at 1.
D1
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
D2
Clock
RXD
D3
D4
D5
Start
D6
D7
Parity
illustrates a character reception in synchronous mode.
Bit
D0
Stop
Bit
Start
Bit
D1
D0
D1
D2
D2
D3
D3
D4
D4
D5
D6
D5
D7
Parity
Bit
Stop
D6
Bit
RSTSTA = 1
D7
AT32UC3L
Parity Bit
Stop Bit
385

Related parts for AT32UC3L064_1