AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 283
AT32UC3L064_1
Manufacturer Part Number
AT32UC3L064_1
Description
AVR32 32-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064_1.pdf
(825 pages)
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Figure 16-2. Basic Mode WDT Timing Diagram, normal operation.
Figure 16-3. Basic Mode WDT Timing Diagram, no clear within T
16.5.1.6
32099A–AVR32–06/09
CLR.WDTCLR
Watchdog reset
CLR.WDTCLR
Watchdog reset
t=t
t=t
Write one to
Write one to
0
0
Watchdog Reset
If the WDT counter is not cleared within T
see
A watchdog reset will result in a reset and the code will start executing from the boot vector,
please refer to the Power Manager chapter for details. If the Disable After Reset (DAR) bit in the
CTRL Register is zero, the WDT counter will restart counting from zero when the watchdog reset
is released.
If the CTRL.DAR bit is one the WDT will be disabled after a watchdog reset. Only the CTRL.EN
bit will be changed after the watchdog reset. However, if WDTAUTO fuse is configured to enable
the WDT after a watchdog reset, and the CTRL.FCD bit is zero, writing a one to the CTRL.DAR
bit will have no effect.
Figure 16-3 on page
T
T
psel
psel
283.
psel
psel
.
a watchdog reset will be issued at the end of T
AT32UC3L
Timeout
Timeout
283
psel
,
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