AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 491
AT32UC3L064_1
Manufacturer Part Number
AT32UC3L064_1
Description
AVR32 32-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT32UC3L064_1.pdf
(825 pages)
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Figure 22-9. Master Read with Multiple Data Bytes
22.8.5
22.8.5.1
32099A–AVR32–06/09
TCOMP
RXRDY
TWD
Using the Peripheral DMA Controller
Write START + STOP Bit
S
Data Transmit with the Peripheral DMA Controller
NBYTES=m
DADR
acknowledged by the master. Not acknowledging the last byte informs the slave that the trans-
fer is finished.
RXRDY is used as Receive Ready for the Peripheral DMA Controller receive channel.
Figure 22-8. Master Read with One Data Byte
The use of the Peripheral DMA Controller significantly reduces the CPU load. The program-
mer can set up ring buffers for the DMA controller, containing data to transmit or free buffer
space to place received data.
To assure correct behavior, respect the following programming sequences:
1. Initialize the transmit Peripheral DMA Controller (memory pointers, size, etc.).
2. Configure the TWIM (ADR, NBYTES, etc.).
3. Start the transfer by setting the Peripheral DMA Controller TXTEN bit.
4. Wait for the Peripheral DMA Controller end TX flag.
5. Disable the Peripheral DMA Controller by setting the Peripheral DMA Controller
R
TXDIS bit.
A
DATA n
TCOMP
RXRDY
TWD
Read RHR
A
STOP Bit, NBYTES=1
DATA n
S
Write START &
DATA (n+1)
DADR
A
DATA (n+1)
Read RHR
R
DATA (n+m)-1
A
DATA
DATA (n+m)-1
A
Read RHR
DATA (n+m)
when NBYTES=0
Read RHR
N
Send STOP
AT32UC3L
P
N
DATA (n+m)
Read RHR
P
491
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